Simulations and Numerical Benchmarks
Computational Executions and the Strict Hardware No-Go Ceiling
Documents all computational executions, semidefinite programming (SDP) hierarchies, and deterministic lattice simulations in the corpus. Crucially, it reinforces the strict firewall: no positive empirical claim on physical quantum hardware is currently authorized.
Claim Boundary & Exclusions Audit
What Is Claimed (Within Scope)
- •CP4.1 HHLWBUILD2F hierarchy: Level 1 through Level 5 certified (Level 6 raw result unavailable and excluded). Values slightly above 1.0 treated as solver tolerance compatible with 1.0.
- •TFIM solvable lattice calculations: Exact numerical verification of direct-integral norm identities for C_inf, C_1, and C_bar.
- •Quantum Switch numerical benchmarks: Verified joint Holevo advantage of 0.083977 bit coexisting with exact equal-prior Helstrom decision neutrality.
What Is NOT Claimed (Prohibited Inferences)
- •NO LABORATORY DEVICE EXPERIMENTAL EVIDENCE EXISTS. All results are computational simulations.
- •Hardware EOB (Emergent Operational Boundary) remains closed negative / no-go.
Technical Exposition & Formulation
Content Governance Item 5 and ADR-06 mandate strict separation of evidence classes. Simulations and model executions are presented with exact parameters, solver tolerances, scripts, and checksums.
Assumptions & Input Data
- Finite-dimensional matrix representations and convex optimization solvers.
- Solver precision tolerances explicitly documented.
Declared Complete Carrier (K3)
Full simulation scripts, inputs, random seed registers, and solver convergence logs.
Source Provenance & Verification Hashes
OIRP_PROGRAM_MASTER_LEDGER.md
Causal_Bounds_Topology_Controlled_Manuscript_JMP_V9...
Challenge This Claim Ceiling
Identified an unstated carrier or a counterexample? Submit a formal challenge.